NEC VRC4173 Companion Chip¶
The NEC VRC4173 is a companion chip to the VR4131 SoC, handling most of the BE-300's external peripherals. It sits on the local bus at physical address 0x0A000000 and provides video output, touchscreen input, CompactFlash, serial, NAND flash control, GPIO, and audio.
Identification¶
| Parameter | Value |
|---|---|
| Board ID | 0x7100 |
| I/O Base | PA 0x0A000000 (kseg1: 0xAA000000) |
| I/O Size | 64 KB |
| Framebuffer | PA 0x0A200000 (kseg1: 0xAA200000) |
Peripheral Register Map¶
| Base Address | Kseg1 Address | Size | Peripheral |
|---|---|---|---|
| 0x0A000000 | 0xAA000000 | -- | PIU / CAK / GPIO base |
| 0x0A000004 | 0xAA000004 | -- | GIRQ0 interrupt status |
| 0x0A000301 | 0xAA000301 | -- | Touchpanel register |
| 0x0A00031C | 0xAA00031C | -- | Touchpanel register |
| 0x0A000304 | 0xAA000304 | -- | Pen-down detection |
| 0x0A000980 | 0xAA000980 | 0x68 | Buzzer (BlgReg_BASE) |
| 0x0A001000 | 0xAA001000 | -- | CompactFlash status |
| 0x0A001128 | 0xAA001128 | -- | CmmReg_BASE |
| 0x0A007800 | 0xAA007800 | -- | ScCmcu |
| 0x0A008000 | 0xAA008000 | -- | Vic / CommMode |
| 0x0A008680 | 0xAA008680 | -- | SIU (serial UART) |
| 0x0A00A000 | 0xAA00A000 | -- | KjCMU (clock management) |
| 0x0A00A042 | 0xAA00A042 | -- | Button/key register |
| 0x0A200000 | 0xAA200000 | ~160 KB | Video memory (framebuffer) |
NAND Controller¶
The NAND flash controller registers begin at offset 0x0C00 from the VRC4173 base:
| Offset | Address | Function |
|---|---|---|
| 0xC010 | 0xAA000C10 | Chip enable |
| 0xC014 | 0xAA000C14 | Command register 1 |
| 0xC020 | 0xAA000C20 | Command/address register |
| 0xC060 | 0xAA000C60 | Transfer kick |
| 0xC064 | 0xAA000C64 | Transfer mode (mode 4/5) |
| 0xC068 | 0xAA000C68 | Boot ECC input |
| 0xC0A0-0xC0AC | 0xAA000CA0 | Boot ECC output (4 regs) |
| 0xC0C0 | 0xAA000CC0 | STATUS2 |
| 0xB000 | 0xAA00B000 | Stream data read buffer |
See NAND Flash for the full read sequence and data format.
Interrupt Registers¶
The VRC4173 has its own interrupt controller with status registers that use write-1-to-clear semantics:
| Offset Range | Function |
|---|---|
| 0x060 - 0x077 | SYSINT1REG and interrupt mask/status |
| 0x1100 - 0x113F | Extended interrupt status |
| 0x1B00 - 0x1B2F | Additional interrupt status |
SYSINT1REG is Read-Only
The SYSINT1REG register at offset 0x060 from the VRC4173 base reflects active peripheral interrupt sources and is read-only on real hardware. The interrupt status registers use write-1-to-clear to acknowledge individual interrupt sources.
Clock Management¶
The KjCMU block at 0xAA00A000 controls peripheral clock gating. NK.exe enables clocks for active peripherals early in the boot sequence.
VRC4173 vs VR4131¶
The two chips have clearly separated address spaces:
- VR4131 on-chip I/O:
0x0F000000(kseg1:0xAF000000) -- BCU, ICU, PMU, RTC, GIU, etc. - VRC4173 companion I/O:
0x0A000000(kseg1:0xAA000000) -- PIU, CF, SIU, video, NAND, etc. - VRC4173 framebuffer:
0x0A200000(kseg1:0xAA200000)
The VR4131 ICU aggregates interrupts from both chips. VRC4173 interrupts cascade through the VR4131 GIU (General-purpose I/O Unit) interrupt lines.
Reference¶
- VRC4173 User Manual (NEC U14579EJ2V0UM00.pdf)
- Interrupts for the full interrupt cascade
- Memory Map for the complete address layout